About Me

I am a fourth-year Ph.D. candidate at Lanzhou University, advised by Prof. Fengyuan Ren. I am a member of the NNS-Chiplet team.

Email: xw2025@lzu.edu.cn OR xuwang10698@gmail.com

If you are interested in our research and would like to discuss it further, please feel free to contact me by email at any time.

RESEARCH INTERESTS

  • Buffer & traffic management for large-scale switching chips
  • Chiplet interconnection architecture and congestion management
  • Wafer-scale & 3D chiplet systems emerging technologies for future high-performance chips

PUBLICATIONS

Hermes: Architecting Congestion Management for Large-Scale NoCs

Yang Zhang, Xu Wang, Lei Xu, Fengyuan Ren

MICRO 2026 CCF-A 59th Annual IEEE/ACM International Symposium on Microarchitecture  ·  Oral Presentation  ·  Oct 31–Nov 4, 2026, Athens, Greece

CrediX: A Credit-driven Distributed Buffer Management for Large-scale Switching Chips

Xu Wang, Yang Zhang, Danfeng Shan, Fengyuan Ren

DAC 2026 CCF-A 63rd ACM/IEEE Design Automation Conference  ·  Oral Presentation  ·  Jul 25–30, 2026, Long Beach, CA, USA

Q-StaR: A Quasi-Static Routing Scheme for NoCs

Yang Zhang, Yiren Zhao, Xu Wang, Fengyuan Ren

arXiv 2026 cs.NI  ·  arXiv:2603.10637

EDUCATION

Lanzhou University

Ph.D. Candidate in Computer Application Technology

Advisor: Prof. Fengyuan Ren

Sept. 2023 – Present

Xi'an Jiaotong University

B.S. in Computer Science

Sept. 2018 – Jun. 2022